Darryl Aldrin M. Dioquino

  • Citations Per Year
Learn More
⎯ Data access in main memory units can be sufficient for processors but due to demands for faster computers nowadays, implementation of multiple cores as well as the usage of a cache to increase performance, are necessary. These two solutions were implemented using a 32-bit pipelined DLX microprocessor, resulting to a dual core capable (DCC) DLX with(More)
  • 1