The behavior of timed DES can be described by sequences of event occurrence times. These sequences can be ordered to form a lattice. Since logical (untimed) DES behaviors described by regular languages also form a lattice, questions of controllability for timed DES may be treated in much the same manner as they are for untimed systems. In this paper we… (More)
The neural circuitry and biomechanics of kicking in locusts have been studied to understand their roles in the control of both kicking and jumping. It has been hypothesized that the same neural circuit and biomechanics governed both behaviors but this hypothesis was not testable with current technology. We built a neuromechanical model to test this and to… (More)
A translator framework enables the use of model checking in complex avionics systems and other industrial settings.
This paper describes a design flow and supporting tools to significantly improve the design and verification of complex cyber-physical systems. We focus on system architecture models composed from libraries of components and complexity-reducing design patterns having formally verified properties. This allows new system designs to be developed rapidly using… (More)
The next generation of military aerospace systems will include advanced control systems whose size and complexity will challenge current verification and validation approaches. The recent adoption by the aerospace industry of model-based development tools such as Simulink® and SCADE Suite™ is removing barriers to the use of formal methods for the… (More)
—Systems are naturally constructed in hierarchies in which design choices made at higher levels of abstraction levy requirements on system components at lower levels of abstraction. Thus, whether an aspect of the system is a design choice or a requirement depends largely on one's vantage point within the hierarchy of system components. Furthermore, systems… (More)
—Pattern solutions  for software and architec-tures have significantly reduced design, verification, and validation times by mapping challenging problems into a solved generic problem. In the paper, we present an architecture pattern for ensuring synchronous computation semantics using the PALS protocol . We develop a modeling framework in AADL to… (More)
The hardware and software in modern aircraft controlsystems are good candidates for verification using formalmethods: they are complex, safety-critical, and challengethe capabilities of test-based verification strategies. Wehave previously reported on our use of model checking toverify the time partitioning property of the Deos¿ real-timeoperating system… (More)