Daniele Folegnani

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<i>The issue logic of a dynamically-scheduled superscalar processor is a complex mechanism devoted to start the execution of multiple instructions every cycle. Due to its complexity, it is responsible for a significant percentage of the energy consumed by a microprocessor. The energy consumption of the issue logic depends on several architectural(More)
A technique to reduce the power consumption of the issue logic of superscalar processors is presented. We have evaluated the power consumption of diierent parts of the architecture through a detailed cycle-by-cycle simulation. The results show that one of the principal power consumption's factor in a superscalar processor is the hardware devoted to extract(More)
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