Daniele D. Caviglia

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In this paper we present a VHDL-based design methodology which we adopted in the design of an ASIC chip for real time image analysis in a quality control industrial environment. The design methodology is based on the following considerations: i) we ezplored the design space by applying some high level transfo~rmations on the VHDL specifications; ii) we(More)
This paper presents a new neural network approach to the pre-placement of VLSI blocks. Our innovation consists in considering the pre-placement problem as a classification problem, and in implementing a neural network learning algorithm, derived from Kohonen maps, to accomplish this task. The neural network has been simulated and the results have been(More)
The Voltage Controlled Oscillator (VCO) is a fundamental block in RF IC architectures. Today's wireless communication applications do require a high level of performances from such a circuit, and specifically its phase noise figure and its power consumption. In fact, modern standards often demand for phase noise level better than - 95 dBc/Hz at 100 KHz in(More)