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- Robert Wille, Daniel Große, Lisa Teuber, Gerhard W. Dueck, Rolf Drechsler
- ISMVL
- 2008

Synthesis of reversible logic has become an active research area in the last years. But many proposed algorithms are evaluated with a small set of benchmarks only. Furthermore, results are often documented only in terms of gate counts or quantum costs, rather than presenting the specific circuit. In this paper RevLib (www.revlib.org) is introduced, an… (More)

- Daniel Große, Robert Wille, Gerhard W. Dueck, Rolf Drechsler
- IEEE Transactions on Computer-Aided Design of…
- 2009

Synthesis of reversible logic has become a very important research area in recent years. Applications can be found in the domain of low-power design, optical computing, and quantum computing. In the past, several approaches have been introduced that synthesize reversible networks with respect to a given function. Most of these methods only approximate a… (More)

Formal verification utilizing symbolic computer algebra has demonstrated the ability to formally verify large Galois field arithmetic circuits and basic architectures of integer arithmetic circuits. The technique models the circuit as Gröbner basis polynomials and reduces the polynomial equation of the circuit specification wrt. the polynomials model.… (More)

- Daniel Große, Hoang Minh Le, Rolf Drechsler
- MEMOCODE
- 2010

Electronic System Level (ESL) design manages the enormous complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for describing complex communication without all the details. As ESL language, SystemC has become the de facto standard. Since the SystemC TLM models are used for early software… (More)

- Daniel Große, Hoang Minh Le, Rolf Drechsler
- MTV
- 2009

- Daniel Große, Robert Wille, Gerhard W. Dueck, Rolf Drechsler
- ISMVL
- 2008

Compact realizations of reversible logic functions are of interest in the design of quantum computers. In this paper we present an exact synthesis algorithm, based on Boolean Satisfiability (SAT), that finds the minimal elementary quantum gate realization for a given reversible function. Since these gates work in terms of qubits, a multi-valued encoding is… (More)

- Robert Wille, Hoang Minh Le, Gerhard W. Dueck, Daniel Große
- 2008 Design, Automation and Test in Europe
- 2008

In the last years synthesis of reversible logic functions has emerged as an important research area. Other fields such as low-power design, optical computing and quantum computing benefit directly from achieved improvements. Recently, several approaches for exact synthesis of Toffoli networks have been proposed. They all use Boolean satisfiability to solve… (More)

- Robert Wille, Görschwin Fey, Daniel Große, Stephan Eggersglüß, Rolf Drechsler
- VLSI-SoC
- 2007

Solvers for Boolean Satisfiability (SAT) are state-of-the-art to solve verification problems. But when arithmetic operations are considered, the verification performance degrades with increasing data-path width. Therefore, several approaches that handle a higher level of abstraction have been studied in the past. But the resulting solvers are still not… (More)

- Görschwin Fey, Daniel Große, Tim Cassens, Christian Genz, Tim Warode, Rolf Drechsler
- 2004

Due to the ever increasing complexity of circuits and systems new methodologies for system design are mandatory. Languages that enable modeling at higher levels of abstraction but also allow for a concise hardware description offer a promising way into this direction. One such language is SystemC. In this paper we propose the SystemC parser ParSyC, that… (More)

- Robert Wille, Daniel Große
- ICCAD
- 2007

The research in the field of reversible logic is motivated by its application in low-power design, optical computing and quantum computing. Hence synthesis of reversible logic has become a very important research area in the last years. In this paper exact algorithms for the synthesis of generalized Toffoli networks are considered. We present an improvement… (More)