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Many-core chip design has become a popular means to sustain the exponential growth of chip-level computing performance. The main advantage lies in the exploitation of parallelism, distributively and massively. Consequently, the on-chip communication fabric becomes the performance determinant. In the meantime, the introduction of Ultra-Wideband (UWB)(More)
— We present a novel test scheduling algorithm for embedded core-based SoCs based on a graph-theoretic formulation. Given a system integrated with a set of cores and a set of test resources, we select a test for each core from a set of alternative test sets, and schedule it in a way to evenly balance the resource usage, and ultimately reduce the test(More)