Damian Grzechca

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This paper presents an analysis of an influence of with Simulation Before Test method. The diagnosis system global parametric faults (GPF) on analogue integrated circuits may be applied on a prototype stage of AIC production. (AIC) time domain (TD) response features, such as overshoot, Global parametric faults, in presented research, have been delay time,(More)
This paper discusses the basic concept of analog recognition techniques), have been known for almost 20 functional test approach. Recently, most on going research has years, however their practical utilization is of no great been focused on distinguishing faulty or healthy circuit from importance [1]. Limitation to catastrophic faults and fault the(More)
This paper presents a new concept to analog fault diagnosis. Problem of distinguishing between healthy or faulty analog circuit has always been very complicated. The most common approach based on pattern recognition, especially on mean square error measure, can not distinguish all faulty circuits from the healthy one. Normally, the dictionary has to include(More)
This paper is focused on the diagnosis of analog and mixed electronic circuit in frequency domain. A multi tone signal excites a circuit under test in order to detect and locate a single fault. The input signal consists of a number of frequencies which are selected by Principal Component Analysis (PCA) algorithm. An exemplary circuit has been examined and(More)
This paper presents method of deriving optimal excitation signal maximizing probability of successful fault diagnosis. The approach uses evolutionary algorithm and wavelet analysis. The diagnosis procedure is conducted by means of specialized aperiodic excitation. Results are compared with fault diagnosis using unit step excitation. The method belongs to(More)
This article presents maximisation of components tolerance together with finding optimal frequency of a periodic excitation in fault diagnosis of analogue electronic circuits. Addi-tionally classical two-stage “detection → location” diagnosis se-quence is merged into single step in order to reduce test time. Presented optimisation(More)
This paper describes new method of fault diagnosis in analog electronic circuits (AEC). Fault diagnosis in analog electronic circuits is in general tested along with one dimension: the generator frequency. In this paper, we present a novel approach that uses more than one dimension to test AEC (those new dimensions are: the load resistance &(More)