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In this paper, the implementation of a sample rate converter for arbitrary sampling rates is presented. The focus is especially on VoIP systems which are used for safety critical applications. In this systems, the sampling rates are nominally equal, but different clock sources cause slight differences. By using SystemC and high level synthesis it was(More)
This paper presents a hardware acceleration system based on a gate-level accelerator and an on-chip microprocessor enabling co-simulation of C-models with gate-level modules on the accelerator. This solution tackles the communication bottleneck that occurs when using hardware accelerators or emulators to speed up simulation. We analyze this bottleneck for(More)