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Deep observation boreholes in the vicinity of active production wells in Honolulu, Hawaii, exhibit the anomalous condition that fluid-column electrical conductivity logs and apparent profiles of pore-water electrical conductivity derived from induction conductivity logs are nearly identical if a formation factor of 12.5 is assumed. This condition is(More)
This paper proposes a self-calibration technique for a pipelined ADC with cyclic ADC structure. In this technique, the pipelined ADC is composed of a series of cyclic ADCs and each stage has independent digital self-calibration (Fig.1). We consider that if we measure the errors of sub-ADCs at the earlier stages by themselves in the pipelined ADC, the(More)
Design of a clock jitter reduction circuit that exploits the phase blending technique between the uncorrelated clock edges that are self-delayed by multiples of the clock cycle, nT is presented. By blending uncorrelated clock edges, the output clock edges approach the ideal timing and, thus, timing jitter can be reduced by a factor of √2 per stage.(More)
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