D. Singh

Publications
Influence

From opencl to high-performance hardware on FPGAS

T. Czajkowski, U. Aydonat, +6 authors D. Singh
Computer Science
22nd International Conference on Field…
25 October 2012

We present an OpenCL compilation framework to generate high-performance hardware for FPGAs, and present the throughput and area results for each application. Expand

FPGA technology mapping: a study of optimality

A. Ling, D. Singh, S. Brown
Computer Science
Proceedings. 42nd Design Automation Conference, .
13 June 2005

This paper attempts to quantify the optimality of FPGA technology mapping algorithms. Expand

Fractal video compression in OpenCL: An evaluation of CPUs, GPUs, and FPGAs as acceleration platforms

D. Chen, D. Singh
Computer Science
18th Asia and South Pacific Design Automation…
29 April 2013

We present a real-time implementation of a fractal compression algorithm that can be efficiently implemented in OpenCL and optimized for multi-CPUs, GPUs, and FPGAs. Expand

Constrained clock shifting for field programmable gate arrays

D. Singh, S. Brown
Computer Science
FPGA '02
24 February 2002

Circuits implemented in FPGAs have delays that are dominated by its programmable interconnect. Expand

Integrated retiming and placement for field programmable gate arrays

D. Singh, S. Brown
Computer Science
FPGA '02
24 February 2002

We introduce a post-placement retiming algorithm that understands how to take advantage of FPGA architectural features that can optimize the delay of a synchronous circuit. Expand

The case for registered routing switches in field programmable gate arrays

D. Singh, S. Brown
Computer Science
FPGA '01
1 February 2001

We analyze the effects of adding a small number of registered routing switches to an FPGA architecture with segmented routing resources. Expand

Harnessing the power of FPGAs using altera's OpenCL compiler

D. Singh, T. Czajkowski, A. Ling
Computer Science
FPGA '13
11 February 2013

In recent years, Field-Programmable Gate Arrays have become extremely powerful computational platforms that can efficiently solve many complex problems. Expand

Invited paper: Using OpenCL to evaluate the efficiency of CPUS, GPUS and FPGAS for information filtering

D. Chen, D. Singh
Computer Science
22nd International Conference on Field…
25 October 2012

We explore techniques that allow programmers to efficiently use FPGAs at a level of abstraction that is closer to traditional software-centric approaches by using the emerging parallel language, OpenCL. Expand

OpenCL for FPGAs: Prototyping a Compiler

T. Czajkowski, D. Neto, +7 authors S. Brown
Computer Science
2013

We present a framework to support OpenCL compilation to FPGAs and present the results on a set of benchmark applications. Expand

Incremental retiming for FPGA physical synthesis

D. Singh, V. Manohararajah, S. Brown
Computer Science
Proceedings. 42nd Design Automation Conference, .
13 June 2005

In this paper, the authors presented a new linear-time retiming algorithm that produces near-optimal results. Expand

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