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Transaction Scheduling Using Dynamic Conflict Avoidance
We propose LUTS, a lightweight user-level transaction scheduler, which provides the means for selecting another transaction to run in parallel, thus improving system throughput. Expand
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ISAMAP: instruction mapping driven by dynamic binary translation
We propose ISAMAP, a flexible instruction mapping driven by dynamic binary translation. Expand
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LUTS: A Lightweight User-Level Transaction Scheduler
We propose LUTS, a Lightweight User-Level Transaction Scheduler, which is based on an execution context record mechanism and present three conflict-avoidance heuristics built around it. Expand
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Reducing False Aborts in STM Systems
This paper shows the real impact of false aborts and how its relevance increases along with the number of concurrent threads, showing it is an essential factor for TM systems. Expand
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Productivity and physiological response of lactating Holstein cows to sugarcane supplementation and evaporative cooling under heat-stress
Abstract The objective of the current study was to evaluate the effects of sugarcane and maize silage mixture v. maize silage in diets of Holstein cows and investigate performance under twoExpand
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Aplicação Móvel para Suporte ao Planejamento de Redes de Distribuição de Energia Elétrica
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Diet and bioclimatic conditions on production and milk quality.
It was aimed to analyze the productive performance of lactating cows on isoprotein fed diets, at differentiated environmental conditions. Eight Holstein cows were used, grouped in two 4 × 4 balancedExpand
Live Range Hole Allocation in Dynamic Binary Translation
Dynamic Binary Translation (DBT) has been used as an approach to transparently run code on different architectures and has generally made use of runtime information to perform effective dynamic compiler optimization. Expand
Dynamic Optimization Effects on DBT
Dynamic Binary Translation can provides code portability between different architectures. The translation process occurs on the fly by translating the binary code from source to target architecture.Expand