• Publications
  • Influence
GALEOR: Leakage reduction for CMOS circuits
High performance and computational capability in the current generation processors are made possible by small feature sizes and high device density. To maintain the current drive strength and controlExpand
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Implementation of Low Power Digital Multipliers using 10 -Transistor Adder Blocks
The increasing demand for the high fidelity portable devices has laid emphasis on the development of low power and high performance systems. In the next generation processors, the low power designExpand
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A current-mode CMOS/memristor hybrid implementation of an extreme learning machine
In this work, we propose a current-mode CMOS/memristor hybrid implementation of an extreme learning machine (ELM) architecture. We present novel circuit designs for linear, sigmoid,and thresholdExpand
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Reconfigurable hardware architecture of the spatial pooler for hierarchical temporal memory
Self-learning hardware systems, with high-degree of plasticity, are critical in performing spatio-temporal tasks in next-generation computing systems. To this end, hierarchical temporal memory (HTM)Expand
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Memristor-Based Neural Logic Blocks for Nonlinearly Separable Functions
Neural logic blocks (NLBs) enable the realization of biologically inspired reconfigurable hardware. Networks of NLBs can be trained to perform complex computations such as multilevel Boolean logicExpand
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A design of HTM spatial pooler for face recognition using memristor-CMOS hybrid circuits
Hierarchical Temporal Memory (HTM) is a machine learning algorithm that is inspired from the working principles of the neocortex, capable of learning, inference, and prediction for bit-encodedExpand
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A Mathematical Formalization of Hierarchical Temporal Memory’s Spatial Pooler
Hierarchical temporal memory (HTM) is an emerging machine learning algorithm, with the potential to provide a means to perform predictions on spatiotemporal data. The algorithm, inspired by theExpand
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Deep Positron: A Deep Neural Network Using the Posit Number System
The recent surge of interest in Deep Neural Networks (DNNs) has led to increasingly complex networks that tax computational and memory resources. Many DNNs presently use 16-bit or 32-bit floatingExpand
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Digital neuromorphic design of a Liquid State Machine for real-time processing
The Liquid State Machine (LSM) is a form of reservoir computing which emulates the brains capability of processing spatio-temporal data. This type of network generates highly descriptive responses toExpand
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Power Profile Obfuscation Using Nanoscale Memristive Devices to Counter DPA Attacks
Side channel attacks (SCAs), such as differential power analysis (DPA), are considered as one of the most competent attacks to obtain the secure key of a cryptographic algorithm. ConventionalExpand
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