D. Moro-Frías

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It is introduced a new genetic algorithm to synthesize the negative-type second generation current conveyor (CCII-) by superimposing a voltage follower (VF) with a current follower (CF). First, the VF and CF are described by binary genes. Second, the gene CF is inverted, rigth-shifted and multiplied (AND operation) with the gene VF to verify that both genes(More)
In this paper a novel Winner-Take-All (WTA) topology is presented which shows good trade-off between resolution and resolution speed, at the cost of some increase in power consumption. The proposed WTA is compared with other current-mode WTAs found in literature based on the same operation principle. All the topologies were designed in a 0.13µm CMOS(More)
The nullor element is implemented herein by using two positive-type second generation current conveyors (CCII+s). The CCII+s are designed using standard CMOS integrated circuit technology of 0.35&#x03BC;m. The main advantage is the very low parasitic resistance of the CCII+ at terminal X (R<sub>X</sub>), in order to accomplish the ideal behavior of the(More)
This paper shows the evolution of voltage followers (VFs) to design positive- and negative-type first (CCI), second (CCII) and third (CCIII) generation current conveyors (CCs), through the addition of current mirrors (CMs). Particularly, three dual-output CCIIs (DOCCIIs) are designed to be electronically tuned by modifying their current bias, thus named(More)
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