D. Le

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An electrical and physical design power optimization methodology and design techniques developed to create an ARM 1136SF-S microprocessor in 9Onm standard CMOS are presented. A 40% reduction in power dissipation has been achieved while maintaining a 355 MHz operating clock rate under typical conditions. Functional and electrical design requirements were(More)
— Minimizing broadcast latency is one of the most important issues for broadcasting in duty-cycled wireless sensor networks. The existing broadcast schemes do not allow any collision in a schedule to ensure its completion, i.e. all nodes receive a broadcast message collision-freely. A delay of transmission caused by the collision-prevention may increase the(More)
A system-centric, fully-hierarchical design methodology and design techniques developed to create four ICs, which provide the core functionality of a multi-gigabit switching network system, are presented. The system is capable of switching more than 500 million packets per second. Electrical and physical design methods for one IC are described. /spl sim/76M(More)
A system-centric, fully-hierarchical design methodology and design techniques developed to create four ICs, which provide the core functionality of a multi-Gigabit switching network system, are presented. The system is capable of switching more than 500 million packets per second. Electrical and physical design methods for one IC are described. /spl sim/76(More)
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