Cs. Rekeczky

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Technological aspects of the 3D integration of a multilayer combined mixed-signal and digital sensor-processor array chip is described. The 3D integration raises the question of signal routing, power distribution, and heat dissipation, which aspects are considered systematically in the digital processor array layer as part of the multi layer structure. We(More)
Displacement calculation algorithm is implemented on a heterogeneous sensor processor architecture, constructed of a mixed signal medium resolution processor array, and a digital, low resolution, foveal processor array. The algorithm is designed as an initial step of an airborne navigation framework. It features multi-scale multi-fovea processing.
The ASIC implementation of a 64times64 sized mixed-signal cellular visual microprocessor architecture with digital processors is described. Measurement results are shown. The architecture is composed of a regular photosensor readout circuit array, prepared for 3D sensor integration, an array of identical SIMD processing elements, and central program(More)
The Multi-core Video Analytics Engine (MVE¿) is an easily configurable, compact, high-performance processing architecture that can be used to implement complete video analytics solutions in a single FPGA embedded in intelligent surveillance cameras. With the steadily growing demand for increased processing power at lower costs for video analytics systems,(More)
2D operators were categorized based on their implementation methods on different low-power topographic and non-topographic single-chip processor architectures. The implementation methods of the 2D operators in the individual categories are shown, and their processor utilization efficiency is analyzed. The execution times of the basic operators on the(More)
We describe laboratory experiments within an attention driven conceptual framework for sensor fusion based on two very different topographic sensors: an ultra-high frame rate low resolution and a high frame rate large resolution visual sensor array. Multiple laser dot detection and localization has been considered with the aim of maximizing the detection(More)
In this work, we present an architecture and algorithmic framework where topographic and non-topographic computation is combined on the basis of several artificial neural network models. The algorithm cores utilize an analogic (analog and logical) architecture consisting of a high resolution optical sensor, a low resolution cellular sensor-processor(More)
In this work we discuss feature/signature selection strategies for on-line classifier systems, implemented on a common stand-alone HW/SW vision system. In the chosen computational environment topographic and non-topographic computing can be combined for the targeted task of terrain feature analysis. The topographic front-end of the system is capable of(More)
" Focal-plane dynamic texture segmentation by programmable binning and scale extraction, " in Single-exposure HDR technique based on tunable balance between local and global adaptation, " IEEE Trans. Bottom-up performance analysis of focal-plane mixed-signal hardware for Viola-Jones early vision tasks, " Int.plane sensing-processing: A power-efficient(More)
Single-exposure HDR technique based on tunable balance between local and global adaptation, " IEEE Trans. Bottom-up performance analysis of focal-plane mixed-signal hardware for Viola-Jones early vision tasks, " Int.plane sensing-processing: A power-efficient approach for the implementation of privacy-aware networked visual sensors, " hierarchical vision(More)