Cristiano Calligaro

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This paper proposes a design methodology for a digital library of cells resistant to cosmic radiation. Most important effects due to radiation are avoided or mitigated using ad hoc design techniques. Fault injection techniques are used to validate the design. Simulations results demonstrate that the cells designed in a 180 nm CMOS technology are tolerant to(More)
This paper presents a tool based on a two dimensional charge-collection simulation to study non-destructive single event effects in CMOS IC blocks. The interaction between the radiation particle and the p-n junctions is modeled at circuit level with a set of parasitic currents, which are injected into the nodes corresponding to the geometrical areas at or(More)
A 512 kbit static random access memory has been designed and fabricated in a single-poly, six-metal 180 nm CMOS technology, with 1.8 V supply. The circuit has been designed to be radiation hard. The basic memory cell is a six transistor cell with a Miller capacitor between the internal latch nodes, to mitigate single event upset. Architectural and circuital(More)
This work presents a rad-hard 4-bit 10MHz Flash ADC for space applications. The converter has been developed using rad-hardened techniques both at architecture and layout levels. The design takes into account the different effects of the radiation that could damage the circuits in harsh environments. The ADC has been integrated in a standard CMOS(More)
This paper presents the design of three static RAM cells, designed to be radiation hard. The memory cells are designed with three different approaches and layout styles. Three memory arrays, each of them made with a different cell, were designed and simulated to optimize the transistor sizes. The layout of the cells has been drawn, and parasitic elements(More)
This paper describes a SRAM designed for space and nuclear physics applications. The device has been designed in a commercial 180 nm CMOS technology using RHBD techniques. Measurement on prototype samples under radiation demonstrate immunity to total dose and latch-up, and an adequate level of hardness with respect to single event effects.
This work presents an asynchronous 2Mbit SRAM designed following radiation hardening by design methodology. The design takes into account the two possible effects that could damage the circuits in harsh environments: cumulative effects due to long-time exposure to radiation and single event effects due to interaction with charged particles. The circuit has(More)
This work presents an innovative architecture to fabricate a non volatile memory for space applications using a S-Flash memory cell. The design takes into account the different effects of the radiation that could damage the circuits and the memory cell in harsh environments. The memory cell has been developed by TowerJazz Semiconductors to be compatible(More)
In this paper a rad-hard design flow for emerging non-volatile memories is discussed. The always growing demand of memory performances is driving to an increasing investigation in new technologies; many emerging technological solutions have been introduced and, as all of them are still an embryonic stage, it is necessary to improve and optimize their(More)
This paper proposes a new non-volatile memory (NVM) architecture that would increase the radiation hardness of standard design. The memory allows storing the configuration bit-stream for on-satellites FPGAs reducing the necessity of information exchange with ground control to recover the system. A 1Mbit non-volatile memory prototype has been fabricated(More)