Cristiano C. de Araujo

Learn More
This paper presents an architecture description language (ADL) called ArchC, which is an open-source SystemC-based language that is specialized for processor architecture description. Its main goal is to provide enough information, at the right level of abstraction, in order to allow users to explore and verify new architectures, by automatically generating(More)
This paper[3.5pc] presents the Platform Designer (PD) framework, a set of SystemC based tools that provide support for modeling, simulation and analysis of multiprocessor SoC platforms (MPSoC), at different abstraction levels. PD provides mechanisms for interconnection specification, process synchronization and communication, thus allowing the modeling of a(More)
System-level and Platform-based design, along with Transaction Level modeling (TLM) techniques and languages like SystemC, appeared as a response to the ever increasing complexity of electronics systems design, where complex SoCs composed of several modules integrated on the same chip have become very common. In this scenario, the exploration and(More)
Unsupervised clustering is a powerful technique for understanding multispectral and hyperspectral images, being k-means one of the most used iterative approaches. It is a simple though computationally expensive algorithm, particularly for clustering large hyperspectral images into many categories. Software implementation presents advantages such as(More)
In this paper is presented a processor centric approach for the modeling and simulation of multi-processors platforms for SoC (MPSoC). It describes how the ArchC architecture description language has been extended to allow the description of multi-processors platforms. It is shown that with minor efforts the designer can model the processors and the(More)
The use of standard languages like VHDL and C for the description of hardware and software IP has became a common practice. Despite this, these languages, specially the hardware description languages lack constructs that allow the IP designer to develop highly re-usable IP blocks. In this paper is described an abstract communication mechanism that uses(More)
This work presents a FPGA design for real time flaw detection on edges based on LEDges technique. The LEDges, on one hand, significantly reduces the computational effort to perform the image segmentation, representation and description. On the other hand reduces the use of costly architectural resources such as processor and memory. Thus the FPGA design of(More)
In this paper we present the development and implementation of an intravenous inf~ision controller system based on fpga’s. The system receives irEformation of an infision drop sensor and controls the drop flow by giving the direction and number of steps of a stepper motor, which compress the drip-feed hose. The system consists of a mixed implementation of(More)