Craig D. Morency

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Work is currently underway at the University of South Florida to integrate automated placement and routing with the language FHDL, for the purpose of general integrated circuit synthesis. Presented is the division of the system into two programs, which separates the tasks of layout synthesis to take advantage of CPU time and memory space. One of the(More)
The FHDL (Florida Hardware Design Language) PLA tools provide a means for specifying, simulating, and automatically laying out Programmed Logic Arrays (PLAs). These tools were created to facilitate VLSI design projects, to improve the quality of hardware design courses, and to serve as a basis for future research in VLSI design automation. At the(More)
The FHDL (Florida Hardware Design Language) ROM tools provide a method for specifying, simulating, and automatically laying out ROMs. The primary focus of the ROM tools is on providing powerful methods for specifying microcode. Because the ROM tools were designed to support both VLSI design projects and other course work in hardware design, the ROM language(More)
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