Cormac M. Oconnell

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A highly manufacturable embedded DRAM technology at 40nm node is presented. This report provides the characterization data of 128Mbit embedded DRAM test vehicle fabricated by 40nm eDRAM 200MHz low power process. The test vehicle is composed of 32 macros and each macro unit is 4Mb with configuration 32k×128 bits. The process is cost effective and(More)
*This work is supported by the US DoE Grants No. DE-FG03-92ER40745, No. DE-AC03-76SF00515, No. DE-FG03-98DP00211, and No. DEFG03-92ER40727, and NSF grants No. ECS-9632735, and No. DMS-9722121. We would like to thank Dr. Peter Tsou of JPL for providing the aerogel. Abstract A plasma wakefield acceleration experiment is conducted at the Stanford Linear(More)
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