Learn More
—Various new nonvolatile memory (NVM) technologies have emerged recently. Among all the investigated new NVM candidate technologies, spin-torque-transfer memory (STT-RAM, or MRAM), phase-change random-access memory (PCRAM), and resistive random-access memory (ReRAM) are regarded as the most promising candidates. As the ultimate goal of this NVM research is(More)
High density, low leakage and non-volatility are the attractive features of Spin-Transfer-Torque-RAM (STT-RAM), which has made it a strong competitor against SRAM as a universal memory replacement in multi-core systems. However, STT-RAM suffers from high write latency and energy which has impeded its widespread adoption. To this end, we look at trading-off(More)
Recent advances in virtualization technologies have made it feasible to host multiple virtual machines (VMs) in the same physical host and even the same CPU core, with fair share of the physical resources among the VMs. However, as more VMs share the same core/CPU, the CPU access latency experienced by each VM increases substantially, which translates into(More)
— Emerging non-volatile memory (NVM) technologies are getting mature in recent years. These emerging NVM technologies have demonstrated great potentials for the universal memory hierarchy design. Among all the technology candidates, resistive random-access memory (RRAM) is considered to be the most promising as it operates faster than phase-change memory(More)
In a virtual machine (VM) consolidation environment, it has been observed that CPU sharing among multiple VMs will lead to I/O processing latency because of the CPU access latency experienced by each VM. In this paper , we present vTurbo, a system that accelerates I/O processing for VMs by offloading I/O processing to a designated core. More specifically,(More)
Wide IO has been standardized as a low-power, high-bandwidth DRAM for embedded system. The performance of Wide IO, however, is limited by the power constraint and unexploited fine-grained memory parallelism. In this work, we propose a novel architecture, 3D-SWIFT, that achieves high access parallelism by partitioning a memory bank into sub-banks with a fine(More)
In mammalian embryonic stem cells, the acquisition of pluripotency is dependent on Nanog, but the in vivo analysis of Nanog has been hampered by its requirement for early mouse development. In an effort to examine the role of Nanog in vivo, we identified a zebrafish Nanog ortholog and found that its knockdown impaired endoderm formation. Genome-wide(More)
  • Cong Xu, Mohammadsharif Tabebordbar, Salvatore Iovino, Christie Ciarlo, Jingxia Liu, Alessandra Castiglioni +6 others
  • 2013
Ex vivo expansion of satellite cells and directed differentiation of pluripotent cells to mature skeletal muscle have proved difficult challenges for regenerative biology. Using a zebrafish embryo culture system with reporters of early and late skeletal muscle differentiation, we examined the influence of 2,400 chemicals on myogenesis and identified six(More)
In chip-multiprocessor (CMP) designs, limited memory bandwidth is a potential bottleneck of the system performance. New memory technologies, such as spin-torque-transfer memory (STT-RAM), resistive memory (RRAM), and embedded DRAM (eDRAM), are promising on-chip memory solutions for CMPs. In this paper, we propose a bandwidth-aware re-configurable cache(More)
—Phase change memory (PCM) has been widely studied as a potential DRAM alternative. The multi-level cell (MLC) can further increase the memory density and reduce the fabrication cost by storing multiple bits in a single cell. Nevertheless, large write power, high write latency, as well as reliability issue resulted from the resistance drift, bring in(More)