Clyde Washburn

Learn More
The input match of RF front-end circuitry can degrade significantly due to process faults and parasitic package inductances at its input pad. The proposed technique ascertains the input match frequency of the circuit by using a built-in self-test (BiST) structure, determines the frequency interval by which it needs to be shifted to restore it to the desired(More)
This paper presents an analytical model for CMOS logic propagation delay which includes the effect of power supply noise. Using the nth power law model of MOSFETs, two scenarios are addressed: self-induced power supply noise and globally-induced power supply noise. The analytical model is verified in simulation for both cases. The self-induced noise model(More)
This paper presents an ultra-fast built in self test (BiST) approach for RF low noise amplifiers. The technique uses test inputs of moderate precision and low overhead base-band circuitry to quantify various functional specifications in the LNA such as input/output match, power gain and linearity. The total self-test time for all these parameters is 15/spl(More)
This paper presents an on-chip BIST technique for a common class of RF communication circuits, which has no measurable impact on the performance of the circuit-under-test. The technique is extremely robust and does not require the use of any DSP cores or off-line processing. The resultant architecture has very low overheads (<4% area overhead), ultra fast(More)
Extraction plays an important role in the performance of device models especially in the high frequency regime. The present day extraction techniques mostly use a grounded source or common source (CS) device configuration. The models extracted from the grounded source devices are then used for devices in other configurations in a circuit application. This(More)
Recent studies have shown that manufacturing costs and design complexities may delay the widespread use of high-&#x03BA;/metal gate nanoscale CMOS technologies. This implies that traditional (non-high-&#x03BA;/non-metal gate) ultra-thin oxide technologies will remain active due to economic factors for longer periods of time. Direct tunneling is a(More)
In this paper, we present the impact of both process and dimensional scaling on input loss (S/sub 11/) prediction of MOSFET's at GHz frequencies. We study the distributed gate effect, the non-quasi static effect, and report a drop in the resistive component of S/sub 11/ for larger fingered devices at high frequencies (> 5 GHz). We identify the boundary at(More)
Accurate prediction of multi-GHz CML dependency on data run-time variation requires precise device models at those frequencies. Inconsistencies caused in the CML by run-time variations of the input data are clearly demonstrated. Further, an accurate RF MOSFET model that can be dynamically changed to adapt to the input data stream variations is implemented.(More)
The input match of low noise amplifiers can degrade significantly due to process faults and the parasitic package inductances at its input pad. These inductances have wide tolerances and are difficult to co-design for. This paper presents a self-correction methodology that will go beyond BIST systems by ascertaining the input match frequency and dynamically(More)