Chutham Sawigun

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—This paper presents a modular technique for transconductance reduction of a sub-threshold transconductor. This technique employs an ordinary differential pair circuit as a module to build a linear attenuator and to be the main transconductor. By applying the linear attenuation, the input linear range expansion and transconductance reduction are(More)
—Two prior-art transconductance amplifier-based rail-to-rail class-AB analog buffers are examined. Their analysis reveals that the output current drive capability for large input voltages is restricted. To mitigate this drawback, a relatively simple slew-rate enhancement scheme is proposed. The new scheme allows the buffer's speed to be increased by over(More)
A CMOS analog buffer with high output drivability is presented. The buffer combines class-AB operation with rail-to-rail signal swing. A new adaptive biasing scheme is proposed with low complexity, thereby allowing the construction of a very compact, low-power analog voltage buffer with wide bandwidth and high slew rate. Simulated results using a 0.35-mum(More)
—This paper proposes the design of a current-mode sample and hold circuit using subthreshold MOSFETs. The proposed circuit combines negative feedback and the compressive characteristic of a class-AB weak inversion transconductor to achieve low switching error, high signal-to-noise ratio and high dynamic range from a low supply voltage and very low current(More)
— According to recent physiological experiments, the envelope and phase of speech signals are required to enhance the perceptive capability of a cochlear implant processor. In this paper, the design of an analog complex gammatone filter is introduced in order to extract both envelope and phase information of the incoming speech signals as well as to emulate(More)
A compact four-quadrant analog multiplier circuit using strong inversion saturated MOSFETs is presented. The circuit is formed by connecting simple 2-input "combiner" and "subtracter" cells in a novel topology. The proposed multiplier features low-voltage operation, very low quiescent power consumption, high-linearity and high operating frequency. In(More)
— A nano-power 4 th-order band-pass filter operating from a 0.5 V supply voltage with an adjustable center frequency, ranging from 250 Hz to 4 kHz (4 octaves), is presented. The filter is constituted from cascadable 2 nd-order circuit cells that are realized by a network of three transistors and two capacitors comprising only one branch of bias current. As(More)