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MediaBench: a tool for evaluating and synthesizing multimedia and communications systems
TLDR
MediaBench is presented, a benchmark suite that has been designed to fill a gap between the compiler community and embedded applications developers and has been constructed through a three-step process: intuition and market driven initial selection, experimental measurement to establish uniqueness, and integration with system synthesis algorithms to establish usefulness. Expand
Power efficient mediaprocessors: design space exploration
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a category of processorsExpand
Synthesis of Hard Real-Time Application Specific Systems
TLDR
The algorithm takes into account task precedence constraints among multiple hard real-time tasks and targets a multiprocessor system consisting of a set of heterogeneous off-the-shelf processors. Expand
Media architecture: general purpose vs. multiple application-specific programmable processor
TLDR
A framework that makes it possible for a designer to rapidly explore the application-specific programmable processor design space under area constraints is reported, which can be valuable in making early design decisions such as area and architectural trade-offs, cache and instruction issue width trade-off under area constraint, and the number of branch units and issue width. Expand
Recent radiation effects activities at JPL: Coping with COTS
In this paper we discuss radiation effects issues that have become important for NASA programs in the last few years. Particularly critical is the increasing usage of commercial off-the-shelf (COTS)Expand
Power efficient mediaprocessors: design space exploration
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a category of processorsExpand
System-level synthesis of application specific systems using A* search and generalized force-directed heuristics
This paper presents a system-level approach to the synthesis of multi-task hard real-time applications. The goal is to select a set of off-the-shelf processors with minimal cost while satisfyingExpand
Synthesis of power efficient systems-on-silicon
TLDR
In order to bridge the gap between the profiling and modeling tools from the two traditionally disjoint synthesis domains, a new synthesis and evaluation platform is developed that integrates the existing modeling, profiling, and simulation tools with the developed system-level synthesis tools. Expand
Application-driven synthesis of memory-intensive systems-on-chip
TLDR
A new approach for area optimization of core-based systems that uses basic block relocation in order to reduce the number of cache misses and enable hardware savings during system synthesis. Expand
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