Chunduri Rama Mohan

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Existing methods for formal verification coverage compare a given specification with a given implementation, and evaluate the coverage gap in terms of quantitative metrics. In this paper, we consider a new problem, namely to compare two formal temporal specifications and to find a set of additional temporal properties that close the coverage gap between the(More)
— Crosstalk noise in the clock network of digital circuits is often detected late in the design cycle, sometimes as late as after first silicon. It is therefore necessary to fix crosstalk violations in the clock tree by making minimal design changes and maintaining skew bounds. We propose a novel approach for making Engineering Change Order (ECO) changes in(More)