Chun-Chien Tsai

Learn More
This work presents an interpolated flying-adder-(FA-) based frequency synthesizer. The architecture of an interpolated FA, which uses an interpolated multiplexer (MUX) to replace the multiplexer in conventional flying adder, improves the cycle-to-cycle jitter and root-mean-square (RMS) jitter performance. A multiphase all-digital phase-locked loop (ADPLL)(More)
— Electrostatic discharge (ESD) protection and latchup prevention are two important reliability issues to the CMOS integrated circuits, especially in high-voltage (HV) applications. In this work, the stacked low-voltage (LV) PMOS devices have been successfully verified in a 0.5-ȝm HV process to provide high ESD level with high holding voltage for HV(More)
  • 1