Christophe Krzeminski

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Self-aligned single-dot memory devices and arrays were fabricated based on arsenic-assisted etching and oxidation effects. The resulting device has a floating gate of about 5-10 nm, presenting single-electron memory operation at room temperature. In order to realize the final single-electron memory circuit, this paper investigates process repeatability,(More)
We present a new fully self-aligned single-electron memory with a single pair of nano floating gates, made of different materials (Si and Ge). The energy barrier that prevents stored charge leakage is induced not only by quantum effects but also by the conduction-band offset that arises between Ge and Si. The dimensions and position of each floating gate(More)
This paper presents the process optimization of a single electron nano-flash electron memory. Self aligned single dot memory structures have been fabricated using a wet anisotropic oxidation of a silicon nano-wires. One of the main issue was to clarify the process conditions for the dot formation. Based on the process modeling, the influence of various(More)
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