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Over the last years LDPC codes became more and more popular because of their near Shannon limit error correcting performance. Structured code classes which ease decoder design have already been standardized for DVB-S2, IEEE WiMax 802.16e or WiFi. In this paper we introduce a flexible decoder architecture which can decode any structured or unstructured LDPC(More)
In this article we present a fully programmable and scalable partly-parallel LDPC decoder architecture together with an optimum mapping and scheduling algorithm. The proposed algorithm exploits the full parallelism of the architecture at any time for any code, which means that the mapping algorithm achieves 100% utilization of the architecture. The proposed(More)
We present a fully programmable layered LDPC decoder architecture together with an optimum mapping and scheduling algorithm. In contrast to other designs proposed in the literature, we use one-phase message passing. This allows for the first time the design of a fully programmable layered decoder. The proposed mapping and scheduling algorithm exploits the(More)
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