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In this article, we present a methodological framework that meets novel requirements emerging from upcoming types of accelerated and highly configurable neuromorphic hardware systems. We describe in detail a device with 45 million programmable and dynamic synapses that is currently under development, and we sketch the conceptual challenges that arise from(More)
Memristive devices present a new device technology allowing for the realization of compact non-volatile memories. Some of them are already in the process of industrialization. Additionally, they exhibit complex multilevel and plastic behaviors, which make them good candidates for the implementation of artificial synapses in neuromorphic engineering.(More)
Classically, action-potential-based learning paradigms such as the Bienenstock-Cooper-Munroe (BCM) rule for pulse rates or spike timing-dependent plasticity for pulse pairings have been experimentally demonstrated to evoke long-lasting synaptic weight changes (i.e., plasticity). However, several recent experiments have shown that plasticity also depends on(More)
— The computational function of neural networks is thought to depend primarily on the learning/plasticity function carried out at the synapse. Neuromorphic circuit realizations have taken this into account by implementing a variety of synaptical processing functions, with most recent synapse circuits replicating some form of Spike Time Dependent Plasticity(More)
State-of-the-art large-scale neuromorphic systems require sophisticated spike event communication between units of the neural network. We present a high-speed communication infrastructure for a waferscale neuromorphic system, based on application-specific neuromorphic communication ICs in an field programmable gate arrays (FPGA)-maintained environment. The(More)
Memristive devices have recently been proposed as efficient implementations of plastic synapses in neuromorphic systems. The plasticity in these memristive devices , i.e. their resistance change, is defined by the applied waveforms. This behavior resembles biological synapses, whose plasticity is also triggered by mechanisms that are determined by local(More)
Neuromorphic realizations of the short-term dynamics at a synapse often use simplistic circuit models. In this paper, we present a more biologically realistic VLSI implementation of these mechanisms. Our circuit approach is analytically derived from a model of neurotransmitter release, so that it can be directly related to simulation results and biological(More)
— In this paper, we present a system architecture currently under development that will allow very large (>10 6 neu-rons, >10 9 synapses) reconfigurable networks to be built, in the form of interlinked dies on a single wafer. Reconfigurable routing and complex adaptation/plasticity across several timescales in neurons and synapses allow for the(More)
Neuromorphic circuits try to replicate aspects of the information processing in neural tissue. Historically, this has often meant some kind of long-term learning function which slowly adjusts the weight of a synapse to achieve a certain target network function. Recently, short-term dynamics at the synapse have also gained significant attention due to their(More)