Christian D. Schuster

Learn More
of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection J. U. Knickerbocker P. S. Andry L. P. Buchwalter A. Deutsch R. R. Horton K. A. Jenkins Y. H. Kwark G. McVicker C. S. Patel R. J. Polastre C. Schuster A. Sharma S. M. Sri-Jayantha C. W. Surovic C. K. Tsang B. C. Webb S. L. Wright S. R.(More)
3-Tetrahydrothiophenone (4) and 4-phenylthiobutan-2-one (7) were used as masked 2-butanone equivalents to give the corresponding cyanohydrins 5 (79 % yield, 91 % ee) and 8 (95 % yield, 96 % ee) in an enzymatic cyanohydrin reaction applying the hydroxynitrile lyase (HNL) from Hevea brasiliensis. After hydrolysis and desulphurisation the desired intermediate(More)
Vias in printed circuit boards (PCBs) and packages are among the components of most concern with respect to signal and power integrity in high-speed communication systems. A good amount of research has been conducted to analyze their behavior. However, when it comes to " physical " or " physics-based " understanding and modeling, vias prove to be quite(More)
A hybrid 3-D and equivalent 2-D finite-element method (FEM) is proposed for signal/power integrity analysis of multiple vias in a shared anti-pad in an arbitrarily shaped parallel-plate pair. The entire domain of the plate pair is decomposed into via-domains and plate domains by virtual interfaces. Complicated fields in via-domains, due to mode conversions(More)
The application of hydroxynitrile lyases (HNLs) as catalysts for the stereoselective condensation of HCN with carbonyl compounds has been reported as early as 1908. This enzymatic C–C bond coupling reaction furnishes enantiopure cyanohydrins which serve as versatile bifunctional building blocks for chemical synthesis. Screening of natural sources led to the(More)
Analytical models for vias and traces are presented for simulation of multilayer interconnects at the package and printed circuit board levels. Vias are modeled using an analytical formulation for the parallel-plate impedance and capacitive elements, whereas the trace-via transitions are described by modal decomposition. It is shown that the models can be(More)
System-on-chip (SOC) and system-on-package (SOP) technologies each have advantages depending on application needs. As system architects and designers leverage ever-increasing CMOS technology densities, a range of two and three dimensional silicon integration technologies are emerging which likely support next generation high-volume electronic applications(More)
A novel application of vertical interconnects (vias) in multilayer structures, such as printed circuit boards (PCBs), is presented. By carefully designing the electromagnetic via environment, it is shown that a pair of signal vias can be used as a building block for microwave couplers. Due to the inductive nature of the coupling, the coupled port is the far(More)
This paper presents a twofold tunable planar hairpin filter to simultaneously control center frequency and bandwidth. Tunability is achieved by using functional thick film layers of the ferroelectric material Barium-Strontium-Titanate (BST). The center frequency of the filter is adjusted by varactors which are loading the hairpin resonators. Coupling(More)