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This specification defines the Document Object Model Level 1, a platform-and language-neutral interface that allows programs and scripts to dynamically access and update the content, structure and style of documents. The Document Object Model provides a standard set of objects for representing HTML and XML documents, a standard model of how these objects(More)
This document is the first release of the Document Object Model Level 2. It is guaranteed to change; anyone implementing it should realize that we will not allow ourselves to be restricted by experimental implementations of Level 2 when deciding whether to change the specifications. This is a W3C Working Draft for review by W3C members and other interested(More)
We have developed highly modular middleware for robotics programming and an interface for multi-robot teleoperation. WURDE provides abstractions for the communications, applications , and systems levels of robotic system development, which helps to isolate the developer from details not essential to the immediate task. RIDE is a control interface inspired(More)
Phosphorylation of the α-subunit of initiation factor 2 (eIF2) controls protein synthesis by a conserved mechanism. In metazoa, distinct stress conditions activate different eIF2α kinases (PERK, PKR, GCN2, and HRI) that converge on phosphorylating a unique serine in eIF2α. This collection of signaling pathways is termed the 'integrated stress response'(More)
Interleukin-1 beta (IL-1 beta), IL-6, IL-8, and tumor necrosis factor-alpha (TNF-alpha) induce acute anorexia by direct action in the central nervous system (CNS) at estimated pathophysiological concentrations reported in the cerebrospinal fluid (CSF). Cytokine-induced anorexia may also participate in the long-term anorexia observed during disease. Here, we(More)
This paper describes our experience applying formal verification to the cache coherence protocol of the HAL S1 System , a shared-memory and/or message-passing multipro-cessor consisting of standard Intel Pentium R Pro symmetric multiprocessing (SMP) servers connected by HAL's proprietary Mercury Interconnect to create a cache-coherent, non-uniform memory(More)
Technical Memorandum NMFS series to issue informal scientific and technical publications when complete formal review and editorial processing are not appropriate or feasible due to time constraints. Documents published in this series may be referenced in the scientific and technical literature. Figure 2. Details of acoustic transect lines and locations and(More)
This paper presents an algorithm for hardware verification that uses simulation and satisfiability checking techniques to determine the correctness of a symbolic test case on a circuit. The goal is to have coverage greater than that of random testing, but with the ease of use and predictability of directed testing. The user uses symbolic variables in simple(More)