Chris Conger

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Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potential system optimizations such as reduced area, increased performance, and increased functionality. Even though recent advances in Xilinx's Virtex-4 and Virtex-5 FPGA devices and design tools significantly improve the practicality of incorporating PR,(More)
Before any application is migrated to a reconfigurable computer (RC), it is important to consider its amenability to the hardware paradigm. In order to maximize the probability of success for an application's migration to an FPGA, one must quickly and with a reasonable degree of accuracy analyze not only the performance of the system but also the required(More)
—Projected demands for future space missions, where on-board sensor processing and autonomous control rapidly expand computational requirements, are outpacing technologies and trends in conventional embedded microprocessors. To achieve higher levels of performance as well as relative performance versus power consumption, new processing technologies are of(More)
RapidIO is an emerging standard for switched interconnection of processors and boards in embedded systems. We use discrete-event simulation to evaluate and prototype RapidIO-based systems with respect to their performance in an environment targeted towards space-based radar applications. This application class makes an ideal test case for a RapidIO(More)
Considerable data have demonstrated that psychological states can influence the immune system in animals. Whether human immune function can be intentionally modulated by the central nervous system is unknown. This article presents data from two studies that sought to demonstrate intentional modulation of the immune system by psychological interventions. It(More)
The design of space systems capable of performing real-time Synthetic Aperture Radar (SAR) is a significant challenge in HPEC due to the high processor, memory, and network requirements imposed by SAR. However, building a system to support SAR and other Space-Based Radar (SBR) algorithms simultaneously is an even greater challenge. This presentation(More)
Space-based radar is a suite of applications that presents many unique system design challenges. In this paper, we investigate use of RapidIO, a new high-performance embedded systems interconnect, in addressing issues associated with the high network bandwidth requirements of real-time ground moving target indicator (GMTI), and synthetic aperture Radar(More)
Space-Based Radar (SBR) processing is a processor-and communication-intensive HPEC application that presents unique design challenges. This talk will concentrate on the presentation of simulation results of mapping a parallel Ground Moving Target Indicator (GMTI) application on an embedded multiprocessor satellite processing system featuring a RapidIO(More)
Network-Attached Storage (NAS) is a widely deployed technology in a variety of settings such as data centers that provides a reasonably cost-effective, powerful, and scalable solution to data storage requirements. As opposed to server-based, direct-attached storage, the NAS concept features storage systems that are directly attached to the network and(More)
Space-based radar applications continue to receive increasing interest from the research community, and new technologies are emerging that will help to make the vision of real-time, on-board, high-volume data processing a reality for next-generation space platforms. Isolated kernel benchmarks may not accurately capture true system performance in the context(More)