Chin Hau Hoo

Learn More
With the increasing number of processors in Multi-processor System-on-Chips (MPSoCs), Network-on-Chips (NoCs) are replacing conventional buses as the inter-processor communication architecture. Since different use cases might be running on MPSoCs, there is a need for dynamically reconfigurable NoC. However, most dynamically reconfigurable NoCs have a large(More)
Leakage power has become an important component of the total power consumption in FPGAs as process technology shrinks. In addition, a significant amount of leakage power in FPGAs is consumed by the routing resources. Therefore, leakage power reduction in FPGAs should begin with the routing resources. In this paper, we propose a novel directional(More)
High functional yield is one of the key challenges for subthreshold standard cell designs. Device upsizing is a commonly used but sub-optimal method due to its overheads in energy and area. In this paper, we propose a robustness-driven intra-cell mixed-V<sub>t</sub> design methodology (MVT-ULV) for the robust ultra-low voltage operation. It uses low(More)
  • 1