Chin-Fong Chiu

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This paper presents a time delay and integration (TDI) structure for CMOS image sensor (CIS) with adjacent pixel signal transfer (APST). The CCD-like TDI function is achieved in CIS by proposed APST without additional in-pixel device and minimum routing effort. The in-pixel integrated signal is transferred to adjacent pixel and summed up by an off-pixel(More)
In this paper, a power-efficient programmable gain amplifier (PGA) and a cyclic analog-to-digital converter (ADC) are developed for a satellite CMOS image sensor system. The cyclic ADC employs capacitor and opamp reuse techniques to reduce power consumption and occupied silicon area. Moreover, a power-efficient and wide-bandwidth telescopic cascode gain(More)
In this paper, the design and application of an on-chip transformer balun for RFIC has presented. Single-ended primary and differential secondary are constructed without using three individual windings for simple layout. Besides, this new topology has the same physical common visual ground point for second winding, which eliminates imbalance due to(More)
This paper presents a full integrated 2.4GHz inductively degenerated cascode low noise amplifier (LNA) realized in a standard TSMC 0.25-/spl mu/m CMOS process. The source degenerated inductor has been design after the electromagnetic (EM) analysis using the calibrated substrate conditions. The measured performance of the proposed LNA shows the noise figure(More)
We report a 5.4 mW ultra low dc power low noise amplifier (LNA) at 5.5 GHz, which is based on a 0.35-mum BiCMOS technology. The trade-off between the NF and linearity for LNA circuit design has been investigated. Furthermore, the usage of the HBT-cascade-MOS methodology is simultaneously satisfied the tradeoff between noise figure (NF) and linearity of LNA.(More)
Conventional TOF depth image sensors have suffered from the reset k<sub>B</sub>TC noise of required accumulation readout of multiple-phase signal without feasible correlated double sampling (CDS) operation. This paper presents a new TOF pixel circuit with k<sub>B</sub>TC reset noise cancellation by proposed equalized reset (ER) operation. Accompanied with(More)
A lag-free CMOS image sensor (CIS) with Constant-Residue Reset (CRR) operation is presented in this paper. It effectively eliminates image lag effect caused by the channel doping profile variation of transfer transistor and non-optimized pixel layout in the 4T-pixel. A prototype 160&#x00D7;120 CMOS imager has been designed and fabricated in 0.18um 1P4M CIS(More)