Chia-An Lin

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With the shrinking size of circuits and the scaling of Network-on-Chip (NoC), the on-chip components will have a higher chance to fail. The on-chip failures can cause traffic congestion and even system crash. To overcome this problem, the NoC routing algorithm should be implemented with fault-tolerant capability. Inspired by the fault-tolerant behavior of(More)
The advanced deep submicrometer technology increases the risk of failure for on-chip components. In advanced network-on-chip (NoC) systems, the failure constrains the on-chip bandwidth and network throughput. Fault-tolerant routing algorithms aim to alleviate the impact on performance. However, few works have integrated the congestion-, deadlock-, and(More)
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