Chi-Chia Sun

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In this paper a low-complexity and highlyintegrated IP Core for image/video transformations is presented. It is possible to perform quantized 8×8 DCT and quantized 8×8/4×4 integer transforms on the presented reconfigurable architecture using only shift and add operations. The XVID experimental and FPGA synthesis results show that the proposed architecture(More)
In this paper, a low-power and high-quality preserving DCT architecture is presented. It is obtained by optimizing the Loeffler DCT based on the Cordic algorithm. The experimental results show that the proposed DCT architecture occupies 19% of the area and consumes about 16% of the power compared to the original Loeffler DCT. Additionally the good(More)
A new method for performing Sparse Matrix–Vector Multiplication (SMVM) by using Network–on–Chip (NoC) architecture is described. In traditional IC design on-chip communications have been designed with dedicated point–to–point interconnections or shared–buses. Therefore, regular local data transfer is the major(More)
Modern VLSI manufacturing technology has kept shrinking down to the nanoscale level with a very fast trend. Integration with the advanced nano-technology now makes it possible to realize advanced parallel iterative algorithms directly which was almost impossible 10 years ago. In this paper, we want to discuss the influences of evolving VLSI technologies for(More)
In this paper, a new design concept for accelerating parallel Jacobi method by using Network-on-Chip (NoC) is presented. The implementation of the Brent-Luk-EVD array is used as an example. In order to further study the tradeoff between the performance/complexity of EVD processors and the load/throughput of interconnects, a mesh structure NoC design based(More)
In this paper, a fastest seat assignment algorithm based on the well-known Left-Edge Algorithm (LEA) and the data structure of buckets in multi-dimension for large-scale passenger reservation system is presented. The time and space complexities are both O(N), where N is the number of tickets. In the meantime, the group tickets will be reserved in the(More)
An extended version of low-complexity IP Core for image/video transformations based on the CORDIC architecture is presented. This IP core is able to perform quantized 8×8 IDCT and quantized 8×8/4×4 H.264-inverse integer transforms on a configurable architecture by using only shift and add operations. Furthermore, the number for CORDIC iterations and(More)