Chen Zhongjian

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This paper presents a precise compensated bandgap reference without resistors. This bandgap reference uses an improved voltage-transfer unit instead of resistors. A current proportional to T/sup /spl alpha// (/spl alpha/ is a constant) is produced to compensate for the higher order of the V/sub EB/. This bandgap reference is based on 0.5/spl mu/m n-well(More)
A 12-bit 20MS/s low power pipelined analog-digital converter (ADC) is presented. A front-end sampling network is proposed to eliminate the need of SHA. Passive capacitor error-averaging technique (PCEA) and Opamp sharing scheme are employed to achieve high resolutions and low power and area. The drawback of conventional Opamp sharing technique is resolved(More)
A correlated double sample (CDS) stage design is proposed for CMOS image readout IC (ROIC) in this paper. A capacitor transimpedance amplifier (CTIA) stage is used as front stage. A parasitic insensitive switch capacitor (SC) circuit is used to realize CDS on chip. This circuit also supports integration-while-read (IWR) mode, then channels low frequency(More)
A design model is proposed to exactly simulate operating principles of gate-coupling NMOS (GCNMOS) ESD protection circuit under ESD stress. Using this model, adequate coupling capacitor C/sub n/ and coupling resistor R/sub n/ can be calculated to improve the efficiency of GCNMOS ESD protection circuit.
Design of CMOS high-speed self-regulating voltage-controlled oscillator (HSSR VCO) using negative skewed delay scheme is presented in this paper. With a SMIC standard logic 0.18-/spl mu/ 1.8V CMOS process, the simulation results show that the HSSR VCO can work at 2.2 GHz with good linearity in frequency-voltage space as over an acceptable tuning range as(More)
An op-amp with a push-pull output stage for infrared focal plane array (IRFPA) readout integrated circuit (ROIC) is described in this paper. It works in the class AB mode with little die area. The op-amp is simulated by the SMIC 0.35-/spl mu/m CMOS process. The circuit is designed to operate from a single 5 V power and drive a capacitive load of 15 pF. The(More)
A novel dual-window readout structure is presented in this paper. The ROIC with this structure can work in two modes: normal mode and windowing mode. The most special feature is that ROIC can readout two sub-arrays synchronously in windowing mode. Furthermore, the positions and sizes of these sub-arrays can be specified by users. This feature allows image(More)
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