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In this paper, we present a BIST scheme for testing on-chip AD and DA converters. We discuss on-chip generation of linear ramps as test stimuli, and propose techniques for measuring the DNL and INL of the converters. We validate the scheme with software simulation—5% LSB (least significant bit) test accuracy can be achieved in the presence of reasonable(More)
This paper proposes a mixed-signal Built-In Self-Test (BIST) architecture based on a second-order delta-sigma modulator. This modulator, which incorporates a design-for-testability (DfT) circuitry, is capable of testing/characterizing itself using digital stimulus. This characteristic is attractive for implementing the modulator as an on-chip analog signal(More)
High performance serial communication systems often require the Bit Error Rate (BER) to be at the level of 10-12 or below. The excessive test time for measuring such a low BER is a major hindrance in testing communication systems cost-effectively. In this paper, we propose a new technique for accurate and efficient estimation of the BER. The proposed(More)
In this paper, we propose a method for extracting the spectral information of a multi-gigahertz jittery signal. This method may utilize existing on-chip single-shot period measurement techniques to measure the multi-gigahertz signal periods for spectral analysis. This method does not require an external sampling clock, nor any additional measurement beyond(More)
In this paper, we propose a simple technique for estimating the standard deviation of a Gaussian random jitter component in a multi-gigahertz signal. This method may utilize existing on-chip single-shot period measurement techniques to measure the multi-gigahertz signal periods for the estimation. This method does not require an external sampling clock, nor(More)
In this paper, we propose a method for extracting the spectral information of a multi-gigahertz jittery signal. This method utilizes existing on-chip single-shot period measurement techniques to sample and measure the period of multiple cycles of the multi-gigahertz periodic signal for spectral analysis. Since measurements are made on the period of multiple(More)
Single-bit second-order delta-sigma modulators are commonly used in high-resolution ADCs. Testing this type of modulator requires a high-resolution test stimulus, which is difficult to generate. This paper proposes a novel and robust technique to determine the performance of the modu-lator, which incorporates simple design-for-testability circuitry. This(More)