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—We present a built-in self-test (BIST) approach able to detect and accurately diagnose all single and practically all multiple faulty programmable logic blocks (PLBs) in field programmable gate arrays (FPGAs) with maximum diagnostic resolution. Unlike conventional BIST, FPGA BIST does not involve any area overhead or performance degradation. We also(More)
We present the first delay-fault testing approach for Field Programmable Gate Arrays (FPGAs), applicable for on-line testing as well as for off-line manufacturing and system-level testing. Our approach is based on Built-In Self-Test (BIST), it is comprehensive, and does not require expensive external test equipment (ATE). We have successfully implemented(More)
In this paper we show that an embedded FPGA core is an ideal host to implement infrastructure IP for yield improvement in a bus-based SoC. We present methods for testing, diagnosing, and repairing embedded FPGAs, for which complete testability is achieved without any area overhead or performance degradation. We show how an FPGA core can provide embedded(More)
– We present an embedded processor based approach for Built-In Self-Test (BIST) and diagnosis of pro-grammable logic and memory resources in Field Programmable Gate Arrays (FPGAs). The resources under test include the programmable logic blocks (PLBs), large random access memories (RAMs), and digital signal processors (DSPs) in all of their modes of(More)
—A field-programmable-gate-array (FPGA)-based built-in self-test (BIST) approach that is used for adaptive control in mixed-signal systems is presented. It provides the capability to perform accurate analog functional measurements of critical parameters such as the third-order intercept point, frequency amplitude and phase responses, and noise figure. The(More)