Charles A. Zukowski

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We present a unique FPGA that uses a mix of digital and large-signal analog computation for the simulation of gene regulatory networks. The prototype IC consists of a 4x5 array of configurable logic blocks along with programmable interconnect. It can simulate a network of pathways involving up to 20 genes and their associated proteins. The circuit design(More)
A new algorithm that produces a sequence of closed-form upper and lower bounds on the response of a very general class of linear RC networks is presented in this paper. The bounds approach arbitrarily close to the actual response by using a successive relaxation method. Since the accuracy of the final bounds can be improved through additional computation,(More)
In this paper, we investigate the use of monotonic static CMOS logic within a high performance carry lookahead adder (CLA) in the context of a 65nm technology with significant leakage. The goal is a good compromise between speed, power, and noise immunity. We compare the monotonic static CMOS 64b CLA with domino and static CMOS adders with respect to speed(More)
This paper explores the characteristics of Monotonic-Static CMOS and its potential applications in gate leakage reduction in a hypothetical 22nm Bulk-Si technology with significant gate leakage currents. Using test circuits consisting of NAND and NOR logic gates, we performed a comparison among static, monotonic static and domino logic in terms of various(More)