Cesare Ronsisvalle

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This paper proposes the characterization, parameter estimation, and modeling of a monolithic cascade, which has been called emitter-switching bipolar transistor (ESBT), suitable for high-voltage applications. Such an innovative device composes of a high-voltage power BJT and low-voltage power MOSFET that are connected in cascade connection, with the MOSFET(More)
This study is aimed to improve the electrical performance (both on-resistance and current capability) of the novel power actuator by varying its horizontal geometry. As a matter of fact the topology of the elementary cell of ESBTreg has the peculiarity that the MOSFET cells are drawn inside the emitter fingers of the bjt side: this in order to achieve the(More)
Recently available on the market the emitter switched bipolar transistor (ESBT) having high voltage breakdown, low voltage drop, and low switching losses as well, represents an interesting alternative to other power transistors thus giving a new chance to further improve the system efficiency. This paper deals with a new silicon technology used to produce a(More)
A simple trick in the device design has permitted to sensibly increase the current capability of ESBT devices. This improvement was obtained without altering neither the design rules, nor the diffusion process, but with a different shape of the base contact. This paper explains some points of the device physics with the help of 3D electrical simulations. As(More)
The aim of this paper is to present the performances of the fully integrated MOS-Gated GTO: a new power device well suited to be applied in the field of high blocking voltages. We start from the characteristics of a fabricated 1.2kV device used to tune the simulator, and we extend the analysis up to 4.5kV blocking voltage. Simulation results are used to(More)
Article history: Received 2 July 2010 Accepted 16 July 2010 Available online 30 August 2010 0026-2714/$ see front matter 2010 Elsevier Ltd. A doi:10.1016/j.microrel.2010.07.078 * Corresponding author. E-mail address: cesare.ronsisvalle@st.com (C. Rons The planar edge termination technique of junction termination extension (JTE) was investigated and(More)
In this paper we present a comparative study between the characteristics of the MOS-Gated GTO, a new power semiconductor device, and the IGBT having the same n<sup>-</sup>n<sup>+</sup>p<sup>+</sup>vertical structure. The blocking voltage of the analyzed devices ranges between 1.2kV and 4.5kV. Simulation results show that the MOS-GTO exhibits a much better(More)
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