Carlos Valderrama

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This work presents a new flexible parameterizable architecture for image and video processing with reduced latency and memory requirements, supporting a variable input resolution. The proposed architecture is optimized for feature detection, more specifically, the Canny edge detector and the Harris corner detector. The architecture contains neighborhood(More)
In this paper the fault-masking capability of N-modular redundancy systems synthesized into SRAM-based FPGAs is evaluated. In the proposed N-modular technique an original self-adaptive majority voter elects the outputs of the redundant modules. Experimentally evaluated neutron cross-section, area, and power consumption were analyzed for different numbers of(More)
Beta diversity, or the turnover in species composition among sampling sites in a region, is an important criterion for obtaining adequate representation of regional biodiversity in systems of protected areas. Recently, the additive model for partitioning regional (gamma) diversity (in opposition to the multiplicative model) has been proposed because it(More)
Dynamic partial reconfiguration (DPR) is a technique that optimizes resource utilization of SRAM-based FPGAs, since it allows changing, on the fly, the functionality of a portion of its logic. A common DPR development flow requires the use of, at least, a microprocessor and several development tools (EDK, XSDK, PlanAhead); moreover, proposals are mainly(More)
One of the main challenges for embedded system designers is to find a tradeoff between performance and power consumption. In order to reach this goal, hardware accelerators have been used to offload specific tasks from the CPU, improving the global performance of the system and reducing its dynamic power consumption. Enabling the use of accelerators could(More)
The development of a system for the automatic, objective, and reliable detection of cough events is a need underlined by the medical literature for years. The benefit of such a tool is clear as it would allow the assessment of pathology severity in chronic cough diseases. Even though some approaches have recently reported solutions achieving this task with(More)
In this paper, we present a FPGA based flexible self-adapting architecture for two features detectors, the Canny edge detector and the Harris corner detector, with reduced latency and memory requirements, and supporting variable resolution images. The new architecture uses neighbourhood extractors that can self-adapt its parameters on-the-fly and algorithm(More)
This work presents the design of a temperature sensor in a 65nm CMOS technology, which is powered by harvesting the electromagnetic energy in the ISM frequency band (2.4GHz). The power consumption of the sensor was substantially reduced so that the energy required to operate could be stored in a 50μF external capacitor. The rectifier sensitivity has(More)
The growing demands on multimedia applications and high-speed high-quality telecommunication systems with real-time constrains oriented to portable, low power consumption, devices, have being driven technologies development, methodologies and design flows of embedded systems during the last years. Through the analysis of design methodologies and strategies(More)
Branch-and-Bound (B&B) algorithms are one of the most employed techniques in optimization problems. Its complexity increases exponentially with problem size and features a challenging dynamic memory management caused by recursive processing. Most solutions focus on parallel branch evaluation in multi-core CPUs or GPUs. To the best of our knowledge, to(More)