Carlos Dualibe

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A fully configurable bias current reference is described. The output of the current reference is a gate voltage which produces a desired current. For each daisy-chained bias, 32 bits of configuration are divided into 22 bits of bias current, 6 bits of active-mirror buffer current, and 4 bits of other configuration. Configuration of each bias allows(More)
A novel architecture for winner-take-all (WTA) and looser-take-all (LTA) circuits is proposed. As compared with other realisations, the LTA does not require input subtraction from a reference, which decreases accuracy and input dynamics. The architectures have been designed using the gm/ID methodology. As it will be shown, this method allows a rapid new(More)
A complete digitally programmable analogue Fuzzy Logic Controller (FLC) is presented. The design of some new functional blocks and the improvement of others aim towards speed optimisation with a reasonable accuracy, as it is needed in several analogue Signal Processing applications. A nine-rules, two-inputs and one-output prototype was fabricated and(More)
One day, you will discover a new adventure and knowledge by spending more money. But when? Do you think that you need to obtain those all requirements when having much money? Why don't you try to get something simple at first? That's something that will lead you to know more about the world, adventure, some places, history, entertainment, and more? It is(More)
A novel architecture for loser-take-all functions is proposed. Inputs and outputs of the circuit are currents, which make the circuit appropriated for low-voltage neural hardware computation. In contrast to most existing realisations the circuit does not require subtraction from a fixed reference what decreases accuracy and input dynamic. Moreover, in(More)
This paper presents a DC analog testing technique based on a simple voltage comparison of the highest sensitivity­ to-faults node, which is found by simulation. The technique is a structural, fault driven testing approach and can be applied to any analog circuit with very few extra added circuitry. A proof of concept has been implemented in a 65nm(More)
A digitally programmable analogue Fuzzy Logic Controller (FLC) is presented. Input and output signals are processed in the analog domain whereas the parameters of the controller are stored in a built-in digital memory. Some new functional blocks have been designed whereas others were improved towards the optimisation of the power consumption, the speed and(More)
a new CMOS voltage reference, which takes advantage of the temperature dependence of NMOS and PMOS threshold voltages, is presented. Due to the circuit architecture the mobility factor is completely cancelled. It does not use resistors and all transistors works in strong inversion. The circuit is simple, opamp-less and can be implemented in a standard CMOS(More)
* M. Verleysen is a research associate of the Belgian FNRS. * This work was financed by the Belgian FNRS. ABSTRACT: A straightforward technique for automatic adaptation of channels equalizers after digital data transmission is presented. Inter-Symbol Interference (ISI) at the received signal is identified by scanning the input stream over time at the data(More)