Carlo Brandolese

Learn More
The paper presents a novel strategy aimed at modelling instruction energy consumption of 32-bits microprocessors. Differently from former approaches, the proposed instruction-level power model is founded on a functional decomposition of the activities accomplished by a generic microprocessor. The proposed model has significant generalization capabilities.(More)
This paper presents a parametric area estimation methodology at SystemC level for FPGA-based designs. The approach is conceived to reduce the effort to adapt the area estimators to the evolutions of the EDA design environments. It consists in identifying the subset of measures that can be derived form the system level description and that are also relevant(More)
Continuous advances in silicon technology enable the development of complex System-on-Chip as cooperation among Digital Signal Processors (DPSs), General Purpose Processors (GPPs), and specific hardware components. The impact of this choice is not only limited to the target architecture, but also encompasses the overall system specification. It is thus(More)
The paper presents a novel strategy aimed at modeling the instruction energy consumption of 32-bits microprocessors. The proposed instruction-level pow er model is founded on a functional decomposition of the activities accomplished by a generic microprocessor and exhibits signi cant generalization capabilities. It allows estimation of the pow er gures of(More)
0141-9331/$ see front matter 2013 Elsevier B.V. All rights reserved. ⇑ Corresponding author. E-mail addresses: (K. Grüttner), nebel@informatik. (W. Nebel), (E. Villar), fornacia@elet. (W. Fornaciari), (C. Ykman-Couvreur),(More)
Software power consumption minimization is becoming more and more a very relevant issue in the design of embedded systems, in particular those dedicated to mobile devices. The paper aims at reviewing state of the art source code transformations in terms of their effectiveness on power and energy consumption reduction. A design framework for the C language(More)
Estimation of software power consumption is becoming one of the major problems for many embedded applications. The paper presents a novel approach to compute the energy of an Instruction Set, through a suitable <italic>functional decomposition</italic> of the activities involved during instruction execution. One of the main advantages of this approach is(More)
Early estimation of embedded software power consumption is a critical issue that can determine the quality and, sometimes, the feasibility of a system. Architecture-specific, cycle-accurate simulators are valuable tools for fine-tuning performance of critical sections of the application but are often too slow for the simulation of entire systems. This paper(More)
This paper presents a prototype hardware/software architecture for minimizing energy consumption on high-end microcontrollers, while simplifying the development of applications providing a general-purpose-like programming environment. The key features enabling this twofold goal are operating system support to processes, optimized sensing and hibernation of(More)