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Transient faults (also known as soft-errors) resulting from high-energy particle strikes on silicon are typically modeled as single bit-flips in memory arrays. Most Architectural Vulnerability Factor (AVF) analyses assume this model. However, accelerated radiation tests on static random access memory (SRAM) arrays built using modern technologies show(More)
Existing nuclear power generation facilities are currently seeking to replace obsolete analog Instrumentation and Control (I&C) systems with contemporary digital and processor based systems. However, as new technology is introduced into existing and new plants, it becomes vital to assess the impact of that technology on plant safety. From a regulatory(More)
Semiconductor devices are becoming more susceptible to single event upsets (SEUs) as device dimensions, operating voltages and frequencies are scaled. The majority of architecture-, logic- and circuit-level techniques that have been developed to address SEUs in logic assume a single-point fault model. This will soon be insufficient as the occurrence of(More)
Dean of the Graduate School ______________________________________ DEDICATION To my parents Donald and Monica and youngest brother Bruce whom we miss very much and dearly love. Also, to my sister Mary and her three daughters Josie, Danny and Alicia. Finally, to my brother Larry who I love and ask that God have mercy on us both. Bryant et al.). I am very(More)
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