• Publications
  • Influence
A Suggestion for a Fast Multiplier
  • C. Wallace
  • Computer Science
  • IEEE Trans. Electron. Comput.
  • 1 February 1964
TLDR
A design is developed for a multiplier which generates the product of two numbers using purely combinational logic, i.e., in one gating step, using straightforward diode-transistor logic. Expand
A virtual memory system for the Hewlett Packard 2100A
TLDR
The Hewlett-Packard 2100 series is a well-established family of 16-bit minicomputers of conventional Von Neumann architecture that all members of the series share the same basic instruction set, addressing modes and data formats. Expand
Reading gapless tape
TLDR
If an input transfer is set up on a channel with initial core memory address an exact multiple of 128, and the channel is made to signal that it is reading gapless tape, the reading will proceed indefinitely, repeatedly cycling over the same 128 word core area. Expand
A discrete system simulation package for a mini computer
TLDR
A general purpose discrete simulation package is described which has been implemented on a Hewlett-Packard 2100A mini computer at Monash University, using Fortran as a host language. Expand
A Learning Model for Discrete Mathematics
TLDR
The invention is adapted where data of large quantities are to be treated, without effecting the rewriting, to achieve high-speed operation. Expand