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A VLSI architecture for lifting-based forward and inverse wavelet transform
TLDR
We propose an architecture that performs the forward and inverse discrete wavelet transform (DWT) using a lifting-based scheme for the set of seven filters proposed in JPEG2000. Expand
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A System Level Energy Model and Energy-Quality Evaluation for Integrated Transceiver Front-Ends
TLDR
A system level energy model for the RF front-end of a wireless transceiver is developed and the effects of signal bandwidth, PAR, symbol rate, modulation level (bits/symbol), transmission distance, and the signal center frequency on the RF energy consumption and communication quality is considered. Expand
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SODA: A Low-power Architecture For Software Radio
TLDR
The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a minimum. Expand
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Efficient realizations of the discrete and continuous wavelet transforms: from single chip implementations to mappings on SIMD array computers
TLDR
This paper presents a wide range of algorithms and architectures for computing the 1D and 2D discrete wavelet transform (DWT) and the CWT that require significantly small storage. Expand
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System-level energy-efficient dynamic task scheduling
TLDR
In this paper, we present dynamic task scheduling algorithms for periodic tasks that minimize the system-level energy (CPU energy + device standby energy). Expand
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A Distributed Canny Edge Detector: Algorithm and FPGA Implementation
TLDR
In this paper, we present a distributed Canny edge detection algorithm that adaptively computes the edge detection thresholds based on the block type and the local distribution of the gradients in the image block. Expand
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AnySP: Anytime Anywhere Anyway Signal Processing
TLDR
AnySP, a fully programmable architecture that targets multiple application domains, addresses these challenges for next-generation mobile signal processing. Expand
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Architectures for wavelet transforms: A survey
TLDR
This paper surveys the VLSI architectures that have been proposed for computing the Discrete and Continuous Wavelet Transforms for 1-D and 2-D signals. Expand
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Energy-efficient dynamic task scheduling algorithms for DVS systems
TLDR
Dynamic voltage scaling (DVS) is a well-known low-power design technique that reduces the processor energy by slowing down the DVS processor and stretching the task execution time. Expand
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AnySP: Anytime Anywhere Anyway Signal Processing
TLDR
AnySP, a fully programmable architecture that targets multiple application domains, addresses these challenges for next-generation mobile signal processing. Expand
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