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Experimental and theoretical study of electrode effects in HfO2 based RRAM
In this work, the impact of Ti electrodes on the electrical behaviour of HfO2-based RRAM devices is conclusively clarified. To this aim, devices with Pt, TiN and Ti electrodes have been fabricatedExpand
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Understanding RRAM endurance, retention and window margin trade-off using experimental results and simulations
In this paper we clarify for the first time the correlation between endurance, window margin and retention of Resistive RAM. To this aim, various classes of RRAM (OXRAM and CBRAM) are investigated,Expand
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Relationship between mobility and high-k interface properties in advanced Si and SiGe nanowires
  • K. Tachi, M. Cassé, +13 authors T. Ernst
  • Materials Science
  • IEEE International Electron Devices Meeting (IEDM…
  • 9 December 2009
For the first time, interface properties between high-k and Si or SiGe nanowires (NWs) have been experimentally investigated by adapting charge pumping technique and low-frequency noise measurement.Expand
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Investigation of the physical mechanisms governing data-retention in down to 10nm nano-trench Al2O3/CuTeGe conductive bridge RAM (CBRAM)
In this work, we present an experimental and theoretical analysis of scaled (down to 10nm) Al2O3/CuTeGe based CBRAM. We focus on the understanding of the physical mechanisms responsible for theExpand
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Sb-doped GeS2 as performance and reliability booster in Conductive Bridge RAM
In this work, for the first time at our knowledge, the improvement of chalcogenide-based CBRAM performance and reliability by Sb doping of the GeS2 electrolyte is presented. An original analysis,Expand
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Experimental and theoretical understanding of Forming, SET and RESET operations in Conductive Bridge RAM (CBRAM) for memory stack optimization
In this paper, we deeply investigate for the 1st time at our knowledge the impact of the CBRAM memory stack on the Forming, SET and RESET operations. Kinetic Monte Carlo simulations, based on inputsExpand
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Interface Engineering of Ag-${\rm GeS}_{2}$ -Based Conductive Bridge RAM for Reconfigurable Logic Applications
In this paper, we show performance and reliability improvement of Ag- GeS2-based conductive bridge RAM (CBRAM) devices by addition of a 2-nm-thick HfO2 layer between the electrolyte and the W bottomExpand
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Low voltage hot-carrier programming of ultra-scaled SOI finflash memories
In this paper, we present a deep investigation of ultra-scaled Finflash memories, fabricated on Silicon on Insulator (SOI) substrate, with Silicon NanoCrystal (Si-NC) or nitride layers acting asExpand
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A stacked SONOS technology, up to 4 levels and 6nm crystalline nanowires, with Gate-All-Around or independent gates (φ-Flash), suitable for full 3D integration
  • A. Hubert, E. Nowak, +15 authors T. Ernst
  • Materials Science
  • IEEE International Electron Devices Meeting (IEDM…
  • 1 December 2009
We present the first experimental study of a Gate-All-Around (GAA) SONOS memory architecture with 4-level crystalline nanowire channels (down to 6nm-diameter). The technology is also extended to anExpand
  • 43
Investigation of the potentialities of Vertical Resistive RAM (VRRAM) for neuromorphic applications
Combining Resistive RAM concept with Vertical NAND technology and design, Vertical RRAM (VRRAM) was recently proposed as a cost-effective and extensible technology for future mass data storageExpand
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