• Publications
  • Influence
Satisfiability Modulo Theories
Many applications of formal methods rely on generating formulas of First-Order Logic (FOL) and proving or disproving their validity. Despite the great progress in the last twenty years in automatedExpand
  • 880
  • 119
  • PDF
Reluplex: An Efficient SMT Solver for Verifying Deep Neural Networks
Deep neural networks have emerged as a widely used and effective means for tackling complex, real-world problems. However, a major obstacle in applying them to safety-critical systems is the greatExpand
  • 655
  • 99
  • PDF
The SMT-LIB Standard Version 2.0
The SMT-LIB initiative is an international effort, supported by research groups worldwide, with the two-fold goal of producing an extensive on-line library of benchmarks and promoting the adoption ofExpand
  • 774
  • 92
  • PDF
CVC Lite: A New Implementation of the Cooperating Validity Checker Category B
We describe a tool called CVC Lite (CVCL), an automated theorem prover for formulas in a union of first-order theories. CVCL supports a set of theories which are useful in verification, includingExpand
  • 322
  • 36
A DPLL(T) Theory Solver for a Theory of Strings and Regular Expressions
An increasing number of applications in verification and security rely on or could benefit from automatic solvers that can check the satisfiability of constraints over a rich set of data types thatExpand
  • 106
  • 21
  • PDF
CVC: A Cooperating Validity Checker
Decision procedures for decidable logics and logical theories have proven to be useful tools in verification. This paper describes the CVC ("Cooperating Validity Checker") decision procedure. CVCExpand
  • 237
  • 20
Counterexample-Guided Quantifier Instantiation for Synthesis in SMT
We introduce the first program synthesis engine implemented inside an SMT solver. We present an approach that extracts solution functions from unsatisfiability proofs of the negated form of synthesisExpand
  • 87
  • 16
  • PDF
Validity Checking for Combinations of Theories with Equality
An essential component in many verification methods is a fast decision procedure for validating logical expressions. This paper presents the algorithm used in the Stanford Validity Checker (SVC)Expand
  • 222
  • 14
  • PDF
A decision procedure for an extensional theory of arrays
A decision procedure for a theory of arrays is of interest for applications in formal verification, program analysis and automated theorem proving. This paper presents a decision procedure for anExpand
  • 154
  • 14
  • PDF
Checking Satisfiability of First-Order Formulas by Incremental Translation to SAT
In the past few years, general-purpose propositional satisfiability (SAT) solvers have improved dramatically in performance and have been used to tackle many new problems.It has also been shown thatExpand
  • 166
  • 13
  • PDF