C. S. Huang

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A novel chip-on-metal structure of the advanced wafer level chip scale package (WLCSP) which has the capability of redistributing the electrical circuit is proposed in this study. In the WLCSP, the solder on rubber (SOR) design expands the chip area and also provides a buffer layer for the deformation energy from the coefficient of thermal expansion (CTE)(More)
SUMMARY A wavelet neural network-based identification approach is presented in this paper to dynamically modeling a building structure. By combining wavelet decomposition and artificial neural networks, wavelet neural networks (WNN) are used for solving chaotic signal processing. The theoretical basis and basic operations of WNNs are first briefly(More)
High performance junctionless Ge Gate-all-around pFETs with fin width down to 9 nm are demonstrated. The device with the L<sub>eff</sub> of 250 nm and channel doping of 8&#x00D7;10 cm- has I<sub>on</sub>/I<sub>off</sub>= 1&#x00D7;10, SS = 95 mV/dec, and I<sub>on</sub> = 390 &#x03BC;A/&#x03BC;m. The gate controllability can be further improved with low EOT(More)
SUMMARY This paper presents a procedure of establishing the discrete equations of motion for a structure via wavelet packet method from its measured responses and inputs. Then, the natural frequencies, damping ratios and mode shapes of the structure can be directly determined. The proposed procedure is applied to process the acceleration responses of a(More)
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