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A novel MEMS device architecture: the SOI SGMOSFET, which combines a solid-state MOS transistor and a suspended metal membrane in a unique metal-over-gate architecture, is proposed. A unified physical analytical model (weak, moderate and strong inversions) is developed and used to investigate main electrostatic characteristics in order to provide(More)
A novel Silicon Sacrificial Layer Dry Etching (SSLDE) technique using sputtered amorphous or LPCVD polycrystalline silicon as sacrificial layers and a dry fluorine-based (SF6) plasma chemistry as releasing process is reported with a detailed experimental study of the release etching step. The process is capable of various applications in surface(More)
A new Room Temperature (RT) 0-level vacuum package is demonstrated in this work, using amorphous silicon (aSi) as sacrificial layer and SiO2 as structural layer. The process is compatible with most of MEMS resonators and Resonant Suspended-Gate MOSFET [1] fabrication processes. This paper presents a study on the influence of releasing hole dimensions on the(More)
A novel MEMS technological platform for RF passive components, namely RF MEMS switches, tuneable capacitors and high-Q suspended inductors, is reported. The proposed process employs a metal (Al, AlSi or Cu) as active movable layer and amorphous silicon or polycrystalline silicon as sacrificial layers, providing multi-air-gaps. Various types of substrates(More)
Microporous silicon membranes, fabricated by lithographic patterning and wet and dry silicon etching processes, were used to create arrays of micro-scale interfaces between two immiscible electrolyte solutions (muITIES) for ion-transfer voltammetry. These membranes served the dual functions of interface stabilization and enhancement of the rate of(More)
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